At present, the nonvolatile memories with highest performance are Flash memories. Flash-memory technology was initially launched on the market as an alternative to EEPROM memories. Like EEPROM memories, Flash memories can be erased and reprogrammed electrically with generally high limits (˜105 cycles) on the number of erase/write cycles. Unlike EEPROM memories, in a Flash memory there is no need to erase the entire memory array in order to store new data in a portion thereof. In fact, Flash memories are typically organized in sectors, each of which can be reprogrammed individually, with different access times for the read operation (˜50 ns), the write operation (˜5 μs) and the erase operation (˜100 ms).
As is known, a Flash memory cell is basically made up of a bulk, an NMOS transistor provided in the bulk and comprising a drain region and a source region that are separate from one another, a control-gate region arranged over the bulk between the drain and source regions, and electrically insulated from the bulk by means of interposition of an insulating material, typically oxide, and a floating-gate region, arranged between the bulk and the control-gate region and electrically insulated therefrom. The floating-gate region is completely insulated from the external environment, and its potential depends upon the electrical charge present therein and upon the capacitive couplings with the other devices of the memory cell.
Furthermore, the memory cell is manufactured in such a way as to obtain a maximum capacitive coupling between the floating-gate region and the control-gate region, which, instead, can be contacted from outside.
The working principle of a Flash-memory cell is based upon the trapping of some electrons in the floating-gate region, the said electrons generating an electrical potential that compensates the electrical potential applied to the control-gate region, thus making it necessary to bring the latter up to a higher electrical potential to obtain a strong inversion in the channel.
In order to distinguish the two possible states (OFF/ON) of the memory cell, a voltage jump is required, which has the function of generating a variation in the threshold voltage of the MOS transistor. This variation determines a distinction between the state in which the floating-gate region does not contain any charge, characteristic of a virgin memory cell or an erased memory cell (represented by a logic “1”), and the state in which the floating-gate region contains a negative charge, characteristic of a programmed memory cell (represented by a logic “0”).
The operation of programming a flash-memory cell envisages the creation of a channel for the electrons in the space-charge area of the drain region, the so-called “pinch-off area”, in order to supply a certain number of electrons with the energy necessary to overcome the potential-energy barrier of the oxide-silicon interface. In this case, by applying an appropriate electrical field, it is possible to favor the migration of these electrons to the floating-gate region, storing on the latter a negative charge. This technique is commonly known as “channel-hot-electron (CHE) injection”.
In flash memories, the erase operation, which consists of removing electrons from the floating-gate region, is obtained by the tunnel effect through the gate oxide, also known as the Fowler-Nordheim. (FN) effect. In this type of memory, erasure by bytes cannot be obtained. As is known, in face, in a typical array architecture of a flash memory, the source regions of all the memory cells are connected to the same common source line, the drain terminals of the memory cells belonging to the same column are connected to the same bit line, and the gate terminals of the memory cells belonging to the same row are connected to the same word line, so that, during the erase operation, all the memory cells belonging to a given sector are simultaneously erased. The capacity of non-volatile memories is strictly linked to the dimensions of the memory cells, which form the array, and to the complexity of the structure, whilst the dimensions of the memory cells are, in turn, strictly linked to the dimensions of the elementary electronic devices that form them.
In the last few years, the substantial success of CMOS technology has been determined basically by the possibility of constantly reducing the size of electronic devices. In fact, this technology follows the so-called Moore's law, according to which the number of the transistors that can be manufactured on an integrated circuit and, hence, the computing speed should double in a time range of between 18 and 24 months.
However, it is a common conviction that conventional silicon microelectronics will not be able to continue indefinitely to follow this law, in so far as sooner or later physical limits will certainly be reached that will prevent current circuits from functioning reliably at nanometric dimensions, whereas, at the same time, an exponential increase in production costs will render any further increase in the levels of integration prohibitive. In fact, as the density of the-electronic devices on a chip increases, phenomena such as the need to dissipate the heat generated by such densely populated circuits, and the transition from the classical behavior to the quantistic behavior of the charge carriers will considerably slow down progress.
The need to solve these problems has pushed research towards the study of new technologies, based upon the use of organic materials that will be able to replace either completely or partially silicon in the fabrication of electronic devices.
In fact, molecular electronics affords the potential for overcoming the limits of on-silicon technology, in so far as it is possible to manufacture single-molecule devices which are organized in parallel by means of self-assembly techniques that are also economically advantageous.
In particular, whilst it is possible, with current technologies, to manufacture high-density Flash memory units with capacities in the region of 64-128 Mb, but with high costs, in future, by resorting to molecular memories, it will be possible to achieve memory capacities of various tens or hundreds of gigabits, in which each memory cell will be formed by one or more molecules, the structural configuration of which may be associated with different possible and modifiable states by means of interactions at an atomic level or at the level of individual electrons.
In recent studies, it has been shown that it is possible to manufacture a non-volatile memory device using a particular protein, rhodopsin. The rhodopsin bacterium, for example, is a photochromic molecule, i.e., a molecule that is able to change color, and hence absorption spectrum, following upon exposure to photons of an appropriate wavelength. In the photocycle of the protein, shown in FIG. 1, two states are distinguishable, designated by bR and Q, which represent, respectively, the logic states “0” and “1”. Furthermore, in FIG. 1, represented by the solid line, are the thermal relaxations, whilst, represented by the dashed line, are the transitions induced by light.
An article appearing in Scientific American Vol. 82 (1994), J. Phys. Chem. B. Vol. 103 (1999) describes the manufacture of electro-optical biomemories, which are based upon the rhodopsin bacterium, in which the reading and writing system employs two laser arrays arranged orthogonally to one another, and a detector array.
For writing the data, a yellow paging laser is used to bring the molecules into the logic state “0”. A spatial light modulator (SLM), which is a liquid crystal display (LCD) array, partitions this beam, so as to excite a two-dimensional surface of material inside the transparent envelope. This surface of optically stimulated material represents the equivalent of a data page.
Before the protein returns to its initial state, a red laser is activated, arranged perpendicular to the yellow laser used for writing the data. Another spatial light modulator displays the binary data and sections this beam so as to display light spots on the page. The molecules arranged at the spots go into the Q-state and represent the logic states “1” on the page. The remaining molecules of the page return to the initial state and represent the logic state “0”.
Reading of the data is also obtained optically, by activating the yellow laser, which excites the page upon which the yellow light impinges to the logic state “0”. This operation is performed with the purpose of further differentiating the absorption spectra of the states that encode the logic “0” and the logic “1”. After 2 ms, the page is impinged upon by a low-intensity red laser, the latter condition being required to prevent any jump into the Q state. The molecules that encode the logic “0” absorb red light, whilst the molecules that encode the logic “1” allow themselves to be traversed by the light beam. In this way, on the charge-injection photodetector array (CID), there is reconstructed an image, formed by light spots and dark spots, corresponding to the information contained in the memory in the form of binary data.
In order to erase the information, a short pulse of blue laser light suffices to convert the molecules from the Q state to the bR state.
This type of optically readable molecular memory presents a number of advantages over traditional semiconductor memories, these advantages being offset, however, by a number of limitations. In the first place, it is possible to produce, in large quantities and at a low cost, the protein on which a molecular memory of this type is based, with performance levels that are very similar to those of traditional semiconductor memories. In addition, the system can be integrated in a high-density architectural configuration, the minimum dimensions of which chiefly depend upon the quantity of biomolecules sufficient for guaranteeing operation, on a statistical basis, of the rhodopsin-bacterium photochromic system.
The limits of memories of this type are prevalently linked to the integratability of the biological material with the silicon and with the cleanroom process steps. In particular, there may arise problems connected to the stability of the protein/silicon link and to the conformational and hence functional stability of the proteins themselves at the interface with the silicon. In addition, a molecular memory that employs the rhodopsin bacterium would have access times in writing and erasure of the order of some milliseconds for a single cell.
Once again, in the framework of biomemories of the type described above, molecular-memory devices have been proposed, which use different types of molecules (rotaxane, pseudo-rotaxane, catenane). In particular, a memory of this type is described in the U.S. Pat. No. 6,128,214, granted on Oct. 3, 2000 in the name of Hewlett-Packard.
Broadly speaking, the above memory device, which is illustrated in FIG. 2, is formed by two parallel layers of nanometric conductors arranged perpendicular to one another, between which there is interposed a layer of molecules. A bistable molecule is arranged in a position corresponding to each intersection of the pairs of conductors and defines, in effect, a switch. An applied voltage modifies the electronic state of the molecules and, hence, the resistance between the top conductor and the bottom conductor. The switches are activated by electrochemical oxidation or reduction of the molecules. When a switch is closed electrochemically, the resistance between the connected conductors is low, and this state constitutes a logic “1”. When the switch is open, the resistance is high, and this state represents a logic “0”. In order to read the state of the switch, it is necessary to apply another voltage, the value of which is such as motto cause switching of the state of the junction. Consequently, the reading process is not destructive.
The limits of the above device are basically linked to the difficulty of arranging the molecules in contact with the nanometric conductors, which are made of silicon or metal, as well as to the instability of the molecules themselves to high temperatures.
In order to overcome the drawbacks of the molecular memories described above, in the article “Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing”, Science, Vol. 389 (5476), Jul. 7, 2000, 94-97, there is proposed the manufacture of nonvolatile memories based upon the use of molecular structures known as carbon nanotubes (CNTs).
It is known that carbon atoms have the property of organizing themselves to form different structures, giving rise to materials of different forms. In fact, a diamond is formed by carbon atoms organized in tetrahedrons, whilst graphite is formed by carbon atoms organized in planar structures. Consequently, these two allotropic forms, albeit originating from the same type of atoms, exhibit structural properties (hardness, elasticity, friction) and functional properties (electrical conductivity, color, etc.) that are highly different and frequently opposite to one another. The structural characteristics, such as hardness and refractoriness, of graphite and diamond render hard to implement, on a device, at nanometric scales, a top-down approach, through which it is possible to arrive at the desired dimensions with successive removal of a macroscopic quantity of a material. Instead, a bottom-up approach, through which it is possible to manufacture, and subsequently assemble, nanoscopic components, starting from individual atoms or molecules, is rendered possible by the use of another allotropic form of carbon, namely fullerene.
Belonging to the family of the fullerenes C60, also known as buckyball, which presents a molecular structure having the shape of a polyhedral cage, consisting of pentagons and hexagons. The buckyball structures that develop as long cylinders, rather than as spheres, are called carbon nanotubes. Their length may be millions of times longer than their diameter. In addition, using known techniques of molecular synthesis, there have been observed, in the laboratory, single-walled cylindrical structures (single-walled nanotubes—SWNTs), having a diameter of 1-2 nm, and multiple-walled structures (multiple-walled nanotubes—MWNTs), i.e., formed by coaxial cylinders with diameters of a few tens of nanometers.
Carbon nanotubes are organic molecules formed by a number of interconnected carbon atoms in a cylindrical structure, characterized by a small weight, and they present exceptional elastic properties, which render them extremely hard, but also capable of undergoing large deformations without breaking. Thanks to their exceptional property of conducting electrical charges, carbon nanotubes, since they can be configured both as conductors and as semiconductors, are suitable for forming components of a new class of nanometric electronic devices.
A nanometric electronic device is described in the above-mentioned article and is shown in FIGS. 3a and 3b. The nanometric electronic device essentially consists of a substrate (for example, doped silicon) on which nanotubes are arranged in two different levels orthogonally with respect to one another and vertically separated by a distance of 1-2 nm, in such a way as to cross at a point corresponding to each memory element. Arranged between the conductive substrate and the first level of nanotubes is a dielectric (for example, silicondioxidee, SiO2), with the purpose of insulating the second level of nanotubes from the substrate, which is polarized with a reference voltage (ground). Moreover, the nanotubes of the second level are arranged on top of spacers made of (organic or inorganic) dielectric material, so as to be insulated from the nanotubes of the first level. Instead, no dielectric is interposed at the points where the nanotubes of the second level and the nanotubes of the first level cross.
The nanotubes are then connected to the rest of the circuit, outside the grid, by means of contacts, made, for example, of gold, These contacts being used both during reading and during writing. In particular, writing of the single memory element is performed by imposing an electrostatic action between the substrate and the point of crossing of the two nanotubes, through the dielectric.
The voltage values imposed depend upon the thickness of the dielectric and upon the energy levels required for guaranteeing a change of state of the nanotube (ON/OFF), in such a way that such changes will be reversible. The OFF and ON states for the individual memory element are shown in FIGS. 4a and 4b, respectively. In particular, a voltage value of 4.5 V for the ON state and a value of 20 V for the OFF state have been estimated.
Consequently, reading of the individual memory element would be done electrically, always by means of the electrical contacts arranged on the edge of the grid, by measuring the resistivity associated to the two states ON/OFF.
The main limitations which, at the moment, prevent industrial development of the above approach are outlined in what follows.
A first limitation is represented by the fact that the techniques used for the manufacture of said architecture do not enable control of the nature of the nanotubes used. In particular, there will be a random distribution of metallic nanotubes (M) and semiconductor nanotubes (S). This implies that, in the read step, the values of resistivity measured on different cells that are in the same state, ON or OFF, undergo, even important, fluctuations according to the geometrical configuration (chirality) of the two nanotubes concerned. For instance, the crossings between nanotubes M-M, S-M, M-S, S-S are possible, to which different levels of resistivity are associated, corresponding both to the ON state and to the OFF state, even though the levels of resistivity for the two states ON-OFF remain, basically, distinguishable.
A second limitation, which may prevent operation of the nonvolatile memory architecture described herein, is represented by the possibility that, during reading operations, current paths are set up, which are able to falsify the interpretation of the state of an individual cell. This problem is known, and occurs, for example, in optical scanning systems of a matrix type. By way of example, FIG. 5 illustrates a schematic circuit diagram in which acquisition of the state is in effect falsified, as a result of the multiple paths of the current Generally speaking, this problem is solved using rectifying diodes connected in series to each sensing element so as to prevent the diodes from being traversed by reverse currents. In the case in point, this possibility would risk markedly influencing the complexity of the system, i.e., the final storage capacity, unless the rectification functions can be integrated by acting directly on the metal-semiconductor characteristics of the nanotubes. In this way, it would be possible to generate Schottky junctions, already integrated in the cell array.
A third limitation is represented by the fact that the configuration entails the manufacture, arrangement, and manipulation of individual nanotubes, appropriately organized and insulated from the rest of the structure. This operation is very difficult, as well as being costly, in so far as the products of the processes of synthesis are, generally speaking, bundles of nanotubes, and the extraction of a single molecule from the bundle would involve additional process steps, together with the manipulation of the molecules.